Metallic microstructure springs and method of making same

Details Metallic microstructure springs and method of making same Metallic microstructure springs and method of making same

1999-12-03

2002-08-27

Patel, Tulsidas (Department: 2839)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C439S066000

Reexamination Certificate

active

06442039

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to microstructures. The present invention relates more particularly to a metallic microstructure spring and method for making the same, wherein the metallic microstructure spring is suitable for use as a spring terminus for interconnecting electronic devices such as printed wiring boards and integrated circuits.
BACKGROUND OF THE INVENTION
Methods for attaching integrated circuits and the like to printed wiring boards (PWBs) are well-known. Such methods enable the fabrication of various electronic subassemblies, such as motherboards and daughterboards for personal computers.
Contemporary methods for attaching integrated circuits to printed wiring boards involve the use of various integrated circuit packaging technologies such as dual in-line package (DIP), plastic lead chip carrier (PLCC), ceramic pin grid array (CPGA), plastic quad flat pack (PQFP), quad flat pack (QFP), tape carrier package (TCP), ball grid array (BGA), thin small outline package gull-wing (TSOP), small outline package J-lead (SOJ), shrink small outline package gull-wing (SSOP) and plastic small outline package (PSOP).
According to DIP packaging technology, the two parallel rows of leads extending from the integrated circuit package pass through holes formed in the printed wiring board and are soldered into the holes. Optionally, a socket may be utilized.
Integrated circuits packaged according to PLCC and CPGA technologies typically require the use of a socket.
PQFP, QFP, TCP, BGA, TSOP, SOJ, SSOP and PSOP are examples of surface mount technology, wherein the packaged integrated circuit is attached directly to a printed wiring board, typically by such techniques as re-flow soldering and/or thermal compression.
For example, BGAs comprise a plurality of electrical contacts formed so as to define a 2-dimensional array upon the bottom surface of an integrated circuit package. Each electrical contact of the BGA comprises a small ball of solder which generally facilitates permanent interconnection of the integrated circuit to a complimentary array of flat electrical contact pads formed upon a printed wiring board. The small solder balls melt during reflow soldering to effect such permanent connection of the integrated circuit to the printed wiring board.
As the number of transistors formed upon a single integrated circuit increases, the attachment of the integrated circuit to a printed wiring board or the like becomes more difficult. This is because integrated circuits having more transistors are more complex and thus generally required more communications pathways to other circuitry. It is expected that the number of transistors formed upon a single integrated circuit will increase from its present number of approximately 80 million to approximately 100 million by the year 2000.
BGAs support high pin counts, so as to facilitate the use of integrated circuits having a large number of transistors formed thereon. By taking advantage of the comparatively large surface area on the bottom of an integrated circuit package, ball grid arrays provide for a comparatively large number of electrical interconnections between the integrated circuit and a printed wiring board.
One problem, which is typically associated with the attachment of integrated circuits and the like to substrates such as printed circuit boards, particularly for ball grid arrays and similar technologies, is associated with the use of materials, having different temperature coefficients of expansion, in the integrated circuits and the substrates. As those skilled in the art will appreciate, the different materials used in the manufacture and/or packaging of integrated circuits and the fabrication of printed circuit boards tend to have different temperature coefficients of expansion. For example, the epoxy or ceramic material of an integrated circuit package has a different coefficient of expansion from the phenolic or epoxy material of a printed circuit board.
Thus, when temperature changes occur, the integrated circuit and the printed circuit board do not tend to expand or contract at the same rate. Such different rates of contraction and expansion result in a dimensional mismatch which may introduce undesirable stress concentrations in permanent interconnections, such as those resulting from the use of soldered joints and the like. Such undesirable stress concentrations may result in the formation of cracks in the interconnections. These cracks may eventually lead to failure of the interconnect to provide desired conductivity or electrical connection, thereby potentially resulting in failure of the entire electrical subassembly.
The effects of such temperature coefficient of expansion mismatches are particularly important in light of the fact that temperature changes are common in many electrical assemblies. Temperature changes typically occur in such electrical assemblies during power-up and power-down of the electrical assembly, as well as during normal environmental temperature changes. It should be appreciated that heat from the power supply, nearby electrical components and the integrated circuit itself may contribute substantially to such temperature changes. In view of the foregoing, it is desirable to provide techniques for mitigating the undesirable consequences of such mismatches of the temperature coefficient of expansion between the integrated circuits and printed circuit board.
Another problem typically associated with the attachment of integrated circuits and the like to substrates, such as printed wiring boards is that of poor electrical connection due to manufacturing tolerances which permit some of the individual connections to be inadequately conductive. Such inadequate conductivity results when one or more of the contacts of either the integrated circuit package or the printed wiring board is not flush or coplanar with the other contacts, such that the non-coplanar contact does not extend sufficiently far from the integrated circuit or printed wiring board to facilitate proper mechanical connection with its mating contact.
As used herein, the term Aintegrated circuit package@ is defined to include any device having electrical contacts formed thereupon for electrically interconnecting the integrated circuit die to a substrate. Such integrated circuit packages include chip-scale packaging (CSP), land grid array (LGA) packaging and ball grid array (BGA) packaging.
It is necessary for such mating contacts to be urged together with a sufficient amount of force to provide good mechanical interconnection thereof, so as to assure adequate electrical conductivity therebetween. In many instances, it is also necessary that sufficient force be provided so as to cause one of the contacts to penetrate an oxide layer of another of the contacts. In any instance, sufficient force is necessary so as to cause the contacts to abut over sufficient surface area at the mating interface thereof to provide the desired electrical conductivity therebetween.
Inadequate electrical connection of the mating contacts of an integrated circuit and a printed wiring board result in signal degradation, which may render the assembly inoperative.
While it is possible to improve the manufacturing tolerances of such devices as integrated circuits and printed wiring boards so as to mitigate the problems associated with inadequate electrical conduction, it is generally not desirable to do so because of the costs associated therewith. As those skilled in the art will appreciate, improving the tolerances of such devices so as to cause the electrical contacts thereof to be more nearly coplanar with one another involves substantial further processing and/or quality control. Such manufacturing procedures may, indeed, be cost prohibitive.
Interposers are frequently used in an attempt to mitigate the problems caused by inadequate electrical conductivity between the contacts of such devices as integrated circuits and printed wiring boards. Interposers typically comprise generally planar substrates having electrical contact

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