Metal-to-metal antifuse structure and fabrication method

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S050000, C257S529000, C438S131000, C438S467000, C438S600000, C438S957000

Reexamination Certificate

active

06809398

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to antifuse technology. More specifically, the present invention relates to metal-to-metal antifuse structures and fabrication methods.
2. The Prior Art
Antifuse devices are known in the art. Antifuse devices comprise a pair of conductive electrodes separated by at least one layer of antifuse material and may include one or more diffusion barrier layers. Prior to programming, antifuses exhibit very high resistance between the two electrodes and may be considered to be open circuits. A programming process disrupts the antifuse material and creates a low-impedance connection between the two conductive electrodes.
Antifuses are generally classifiable in two categories. A first type of antifuse has a doped region in a semiconductor substrate as its lower electrode and a layer of metal or doped polysilicon as its upper electrode. The antifuse material typically comprises one or more layers of silicon nitride or silicon dioxide. This type of antifuse is referred to as a substrate antifuse.
A second type of antifuse has a first metal layer disposed above and insulated from a semiconductor substrate as its lower electrode and a second metal layer as its upper electrode. The antifuse material typically comprises a layer of a material such as amorphous silicon and may be accompanied by one or more barrier metal layers separating it from lower and upper metal interconnect layers. This type of antifuse is referred to as a metal-to-metal antifuse.
Numerous structures for metal-to-metal antifuses have been proposed for and are known in the art. Illustrative and non-exhaustive examples of metal-to-metal antifuses are shown in U.S. Pat. No. 5,272,101 to Forouhi et al.
BRIEF DESCRIPTION OF THE INVENTION
A metal-to-metal antifuse according to the present invention is compatible with a Cu dual damascene process and is formed over a first Cu metal layer planarized with the top surface of a lower insulating layer. A lower barrier layer is disposed over the Cu metal layer. An antifuse material layer is disposed over the lower barrier layer. An upper barrier layer is disposed over the antifuse material layer. An upper insulating layer is disposed over the upper barrier layer. A second Cu metal layer is planarized with the top surface of the upper insulating layer and extends therethrough to make electrical contact with the upper barrier layer.
A method for fabricating a metal-to-metal antifuse according to the present invention comprises forming a lower barrier layer over a lower Cu metal layer planarized with the top surface of a lower insulating layer. An antifuse material layer is then formed over the lower barrier layer. An upper barrier layer is formed over the antifuse material layer and the upper barrier layer and antifuse layer are defined. An upper insulating layer is formed over the upper barrier layer and antifuse layer and a via is formed to expose the top surface of the upper barrier layer. A second Cu metal layer is formed and planarized with the top surface of the upper insulating layer and extends therethrough in the via to make electrical contact with the upper barrier layer.


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