Metal-to-metal antifuse structure

Details Metal-to-metal antifuse structure Metal-to-metal antifuse structure

1993-12-14

1995-09-19

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257 50, 257528, 257529, 257635, 257758, 257760, H01L 2904, H01L 2702, H01L 2348

Patent

active

054518105

ABSTRACT:
A method of forming a metal-to-metal antifuse. An antifuse stack 32 is formed comprising a first metal layer 16, an antifuse dielectric layer, and an etchstop layer. The etchstop layer may, for example, comprise an oxide layer 24 and an amorphous silicon layer 28. An antifuse via 44 is etched through an interlevel dielectric layer 36 to the antifuse stack 32. Next, a portion of the etchstop layer at the bottom of via 44 is removed. Finally, a second layer of metal 48 is deposited to fill antifuse via 44 and etched to form the desired interconnections.

REFERENCES:
patent: 5100827 (1992-03-01), Lytle
patent: 5171715 (1992-12-01), Husher et al.
patent: 5181096 (1993-01-01), Forouhi

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