Metal sulfide-oxide semiconductor transistor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257S406000, C257S410000, C257S411000, C257S412000

Reexamination Certificate

active

06670651

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to low power and high speed integrated circuits in the compound semiconductor field utilizing field effect transistors and more specifically complementary field effect transistors used in concert including enhancement mode self-aligned metal-insulator-compound semiconductor transistors and depletion mode self-aligned metal-sulfide-compound semiconductor transistors and methods of materials growth and fabrication of said structures and the ultra large scale integration of said transistors.
2. Discussion of the Background
The gallium arsenide and indium phosphide integrated circuit industry has been limited without a technology that simultaneously allows the integration of complementary field effect transistor devices and transistors with low gate leakage currents. In contrast to silicon technology that has a very mature and useful complementary metal oxide semiconductor (CMOS) technology. Field effect transistor (FETs) widely used in the III-V semiconductor industry employ metal gates and Schottky gate contacts that are have quiescent-state leakage currents exceeding many microamps. The use of metal gates in compound semiconductor technology further results in individual transistors and integrated circuits that have excessively high power dissipation, reduced transconductance, reduced logic swing and the inability to operate on a single power supply, and generally limited performance characteristics. The high magnitude of the quiescent leakage current limits the maximum integration of GaAs devices to circuits of several hundred thousand transistors for those skilled in the art. In contrast, the simultaneous integration of many millions of transistors is possible at high integration densities using silicon CMOS technology. These ultra high integration densities and levels cannot be obtained using metal, Schottky-style gates that are not insulated in compound semiconductor FETs. Thus Si CMOS technology offers significant advantages in terms of individual gate leakage, circuit integration level and cost.
However when compared to silicon, complementary GaAs and InP circuit technology exhibits faster and more optimized speed/power performance and efficiency at a low supply voltage of IV and below. The market acceptance of these GaAs and InP integrated circuit technologies remains low because of the lack of ability to demonstrate high integration densities with low amounts of operating power. Thus, silicon CMOS dominates the field of digital integrated circuitry and neither GaAs nor InP technologies can successfully penetrate this market.
What is needed are new and improved compound semiconductor field effect transistors (FET). What is also needed are new and improved compound semiconductor FETs using metal-insulator-semiconductor junctions (MISFET). What is also needed are new and improved compound semiconductor MISFETs using a self-aligned gate structure. What is also needed are new and improved self-aligned compound semiconductor MISFETs using enhancement mode and depletion mode operation. What is also needed are new and improved self-aligned compound semiconductor MISFETs with stable and reliable device operation. What is also needed are new and improved self-aligned compound semiconductor MISFETs which enable optimum compound semiconductor device performance. What is also needed are new and improved self-aligned compound semiconductor MISFETs with optimum efficiency and output power for RF and microwave applications. What is also needed are new and improved self-aligned compound semiconductor MISFETs for use in complementary circuits and architectures. What is also needed are new and improved self-aligned compound semiconductor MISFETs for low power/high performance complementary circuits and architectures. What is also needed are new and improved self-aligned compound semiconductor MISFETs which offer the design flexibility of complementary architectures. What is also needed are new and improved self-aligned compound semiconductor MISFETs which keep interconnection delays in ultra large scale integration under control. What is needed are new and useful complementary integrated circuits where each individual transistor has a leakage current approaching 10
−12
amp. What is needed is a truly useful integrated circuit technology for GaAs and InP that allows for the useful and economical operation of ULSI digital integrated circuits in compound semiconductors. What is needed are new and improved compound semiconductor MISFET integrated circuits with very low net power dissapation. What is needed are new and improved compound semiconductor MISFET devices with low gate leakage currents that may be integrated together to form ultra large scale integrated circuits that include millions of transistors. What is needed are new and improved complementary MISFET devices and circuits in compound semiconductors that allow the direct use, transfer and application of silicon CMOS design that already exits in the art.
What is also needed are new and improved methods of fabrication of self-aligned compound semiconductor MISFETs. What is also needed is new and improved methods of fabrication of self-aligned compound semiconductor MISFETs which are compatible with established complementary GaAs heterostructure FETs technologies. What is also needed are new and improved compound semiconductor MISFETs which are relatively easy to fabricate and use.


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