Metal-semiconductor field effect transistor having reduced contr

Details Metal-semiconductor field effect transistor having reduced contr Metal-semiconductor field effect transistor having reduced contr

1996-04-30

1997-12-16

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

H01L 2980, H01L 31112

Patent

active

056988753

ABSTRACT:
A metal semiconductor field effect transistor (MESFET) having a reduced control voltage while maintaining appropriate performance characteristics is disclosed. The MESFET is fabricated by a two step implantation technique for fabricating the ohmic contact region in the channel between the source and drain. This implant process results in higher doping levels of the active channel and a increased conductivity. Additionally, this step defines the channel depth, which in turn defines the pinch-off voltage. In the preferred embodiment of the present invention, the channel thickness is on the order of 2000 Angstroms. Parasitic capacitance is reduced to an acceptable level by reduction in the gate length. Finally, after the implantation of donor dopants to effect the active channel, a suitable acceptor dopant, preferably beryllium, is implanted to produce a well defined channel boundary, to reduce the donor dopant tails. This facilitates the control of the pinch-off voltage.

REFERENCES:
IEEE Electron Device Letters; "Improved GaAs Power FET Performance Using Be Co-Implantation"; vol. EDL-8; Mar. 1987; Macksey et al.
Electronics Letters; "GaAs MESFETS With a Buried p-Layer for Large-Scale Integration"; vol. 20; pp. 98-100; Jan. 1984; Y. Umemoto et al.
IEEE Trans. Electron Devices; "Buried p-layer Saint for very high-speed GaAs LSI's with submicrometer gate length"; vol.ED-32; pp. 2420-2425; Nov. 1985; K. Yamasuki et al.

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