Metal planarization process

Coating processes – Electrical product produced – Welding electrode

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Details

2041921, 156644, 156643, 427 88, 427 93, H01L 21268

Patent

active

046735925

ABSTRACT:
The present invention discloses a method for planarizing contact holes, vias, and other surface depressions, during the fabrication of an integrated circuit structure. Differential thermal conductivities are exploited to selectively remove a deposited film of metal from high-thermal-resistance areas, such as silicon dioxide or other insulators, and not from low-thermal-resistance areas, such as silicon or metal. By repetition of this step, very deep depressions, having a high aspect ratio, are reliably filled.

REFERENCES:
patent: 4377421 (1983-03-01), Wada
patent: 4388517 (1983-06-01), Schulte
patent: 4448636 (1984-05-01), Baber
patent: 4465716 (1984-08-01), Baber et al.

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