Metal-oxide-semiconductor device having integrated bias circuit

Details Metal-oxide-semiconductor device having integrated bias circuit Metal-oxide-semiconductor device having integrated bias circuit

2005-10-18

2005-10-18

Tra, Quan (Department: 2816)

Amplifiers

With semiconductor amplifying device

Including particular biasing arrangement

C330S289000

Reexamination Certificate

active

06956437

ABSTRACT:
An IC device includes an MOS device having a gate terminal, a source terminal and a drain terminal, the gate terminal being operatively coupled to an input of the IC device, the drain terminal being operatively coupled to an output of the IC device, and the source terminal being coupled to a negative voltage supply. The IC device further includes a bias generator operatively coupled to the gate terminal of the MOS device, the bias generator generating a bias voltage and/or a bias current for biasing the MOS device at a substantially constant quiescent operating point. The bias generator is configured such that the bias voltage and/or bias current varies as a function of a junction temperature of the MOS device. In this manner, the bias generator accurately tracks one or more operating conditions of the MOS device, thereby improving the performance of the device.

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patent: 04 25 6760 (2005-04-01), None
R.J. Widlar et al., “Dynamic Safe-Area Protection for Power Transistors Employs Peak-Temperature Limiting,” IEEE Journal of Solid-State Circuits, vol. SC-22, No. 1, pp. 77-84, Feb. 1987.

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