Metal-oxide-semiconductor circuit designs and methods for...

Amplifiers – With semiconductor amplifying device – Including protection means

Reexamination Certificate

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C330S311000, C330S253000

Reexamination Certificate

active

07859340

ABSTRACT:
Complimentary Metal-Oxide-Semiconductor (CMOS) circuits made with core transistors are capable of reliable operation from an IO power supply with voltage that exceeds the reliability limit of the transistors. In embodiments, biasing of an operational amplifier is changed in part to a fixed voltage corresponding to the reliability limit. In embodiments, switched capacitor networks are made with one or more amplifiers and switches including core transistors, but without exposing the core transistors to voltages in excess of their reliability limit. In embodiments, operational transconductance amplifiers (OTAs) include core transistors and operate from IO power supplies. Level shifters for shifting the levels of a power down signal may be used to avoid excessive voltage stress of the OTAs' core transistors during turn-off. Non-level shifting means may be used to clamp output voltages and selected internal voltages of the OTAs, also avoiding excessive voltage stress of the core transistors during turn-off.

REFERENCES:
patent: 6011419 (2000-01-01), Nowak et al.
patent: 6714076 (2004-03-01), Kalb
patent: 6911871 (2005-06-01), Li et al.
patent: 6998902 (2006-02-01), Sugimura
patent: 7102410 (2006-09-01), Khan et al.
patent: 7196571 (2007-03-01), Sumita
patent: 7215171 (2007-05-01), Kocaman et al.
patent: 7272053 (2007-09-01), Choy
patent: 2005/0174171 (2005-08-01), Oswal et al.
patent: 2006/0255852 (2006-11-01), O'Donnell et al.
International Search Report—PCT/US08/058527—International Search Authority, European Patent Office—Oct. 7, 2008.
Written Opinion—PCT/US08/058527—International Search Authority, European Patent Office—Oct. 7, 2008.
Gentinne B., et al., “Improvement of the performances of SOI CMOS operational amplifiers by means of a gain-boosting stage,” Proceedings of the International SOI Conference. Palm Springs, Oct. 5 19931005; 19931005-19931007, New York, IEEE, Conf. 19, Oct. 5, 1993, pp. 184-185.
Wyszynski A., et al., “VHF highly linear fully-balanced CMOS OTA,” Proceedings of the International Symposium on Circuits and Systems. Chicago, May 3-6, 1993, New York, IEEE, May 3, 1993, pp. 1156-1159.
Minot S., et al., “BiCMOS OTA for high Q very high frequency continuous-time bandpass filters,” Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Monterey, CA, May 31-Jun. 3, 1998, New York, IEEE, vol. 1, May 31, 1998, pp. 61-64.

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