Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2001-05-25
2003-02-11
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S773000, C349S139000
Reexamination Certificate
active
06518676
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to metal interconnections and an active matrix substrate using the metal interconnections, for use in flat panel displays such as liquid crystal displays (LCD), plasma display panels (PDP), electrochromic displays (ECD) and electroluminescent displays (ELD), printed wiring boards using ceramic plate boards, and other various fields.
In a flat panel display typified by liquid crystal display (LCD), display material such as liquid crystal and discharge gas are enclosed and held between a pair of substrates, conventionally, and display operation is performed by applying a voltage to the display material. In this structure, electrical wiring that comprises conductive material is arranged on at least one of the substrates.
In an active matrix driving display, for example, a matrix pattern of gate electrodes and data electrodes is provided on one (an active matrix substrate) of a pair of substrates that enclose and hold display material, and thin film transistors (TFTs) and pixel electrodes are provided at each intersection of the gate electrodes and the data electrodes. Conventionally, these gate electrodes and data electrodes are formed of metal material such as Ta, Al and Mo, and the electrodes are deposited with a dry deposition technique such as sputtering.
In an attempt to increase the area and definition of such a flat panel display, the delay of driving signal turns out to be a considerable problem because of the increase in the driving frequency and the increase in the resistance and parasitic capacity of the electrical wiring.
As an attempt to solve the problem of the delay of driving signal, Cu having the lower electric resistance (bulk resistance of 1.7 &mgr;&OHgr;·cm) has been used as interconnecting material, in place of conventional interconnecting materials, i.e., Al (having bulk resistance of 2.7 &mgr;&OHgr;·cm), &agr;-Ta (having bulk resistance of 13.1 &mgr;&OHgr;·cm) and Mo (having bulk resistance of 5.8 &mgr;&OHgr;·cm). For example, the result of the study on a TFT-LCD utilizing Cu as the material of the gate electrode has been disclosed in a literature “Low Resistance Copper Address Line for TFT-LCD” (Japan Display '89, p.498-501). In the literature is specified that a Cu film deposited with sputtering has a poor adhesion to a ground glass substrate and requires the interposition of a film of metal such as Ta on the ground in order to improve the adhesion.
The interconnecting structure disclosed in the literature requires each ground metal film such as Cu film and Ta to be individually subjected to a dry depositing process and an etching process, resulting in the increase in the number of processes and the rising of the cost.
In Japanese Patent Laid-open Publication HEI 04-232922 is proposed a method of using a transparent electrode that comprises ITO (indium tin oxide) or the like for a ground film and depositing a metal film such as Cu on the ground film with plating technique. As an effect described therein, this technique allows plating metal to be selectively deposited only on the ITO film and requires patterning process only for the ITO film of the transparent electrode and permits Cu interconnections with a large area to be deposited efficiently. There is also described a structure in which a metal film such as Ni with a satisfactory adhesion to ITO is interposed between ITO and Cu.
In Japanese Patent Laid-open Publication HEI 10-321622 is proposed a method of forming a reversely tapered resist on a ground metal and performing electroplating thereon and thereby forming a normally tapered film. For the definitions of “normal taper” and “reverse taper,” as shown in
FIG. 8
, the case that a taper angle &thgr; which both sides of a plating film
112
formed on a glass substrate
111
form with the surface of the glass substrate
111
is not greater than 90° is defined as “normal taper.” As shown in
FIG. 9
, the case that a taper angle &thgr; which both sides of a plating film
122
formed on a glass substrate
121
form with the surface of the glass substrate
121
is greater than 90° is defined as “reverse taper.”
In the formation of the metal interconnections on the ground ITO film with plating technique as disclosed in the Japanese Patent Laid-open Publication HEI 04-232922, a pretreatment for plating is performed with chemicals based on HF (hydrogen fluoride) for the selectivity of metal film deposition on the glass and the ground ITO film and for the adhesion of the plating film to the ground film. (This treatment is performed for the elimination of catalyst adhering to the glass, in most cases, regardless of the type of the ground film, and is applied even to polyimide or the like.) In the deposition of a metal film with plating, or in the degreasing with alkaline solution for the elimination of dirt on the surface, or in the use of alkaline plating solution as in Cu plating, the glass surface not covered by ground pattern is etched by the reason proper to plating. The word “plating” used herein refers to electroless plating, electroplating and the like.
It also has been found that a plating film generates the part that rapidly grows and the part that slowly grows with the growth of the film.
In this manner, the glass surface not covered by the ground film may be etched and the formed film may be reversely tapered because of the difference in the growth rate of the film.
In the case that the plating film
122
is reversely tapered as shown in
FIG. 9
, the deposition of another film on the metal interconnections and the patterning on the metal interconnections present such problems as the following. In the deposition, masking by the reversely tapered part may prevent the film from being deposited properly in the edge part of the interconnecting lines, resulting in a step-wise disconnection caused by a film cracking in the edge part. Besides, in the etching process, masking by the metal lines may produce a remaining film in the edge part.
In the method of forming normally tapered metal lines by the formation of a resist, electroplating and ground etching as disclosed in the Japanese Patent Laid-Open Publication HEI 10-321622, a large substrate (a large glass) might cause large variations in the thickness of the film over its whole width because of the employment of electroplating. In the etching of the ground, even a volume of the ground film below the plating film may be etched to form a shape like an umbrella as shown in FIG.
10
. (This influence is especially large in wet etch; however, even in dry etching, the ground film undergoes such an influence though smaller than in wet etching.)
SUMMARY OF THE INVENTION
An object of the present invention is to provide metal interconnections that prevent step-wise disconnections and remaining film and to provide an active matrix substrate using the same, by the deposition of a plating film with a satisfactory shape of taper on a ground pattern film.
In order to achieve the above object, there is provided metal interconnections which are formed on a glass substrate and comprise a ground pattern film for interconnecting lines and a plating film formed by selective plating on the ground pattern film, characterized in that a taper angle a which both sides of the plating film form with the surface of the glass substrate is in the range of 0<&agr;≦90°.
According to the metal interconnections with the above arrangement, the taper angle &agr; which both sides of the plating film formed by selective plating on the ground pattern film form with the surface of the glass substrate is in the range of 0<&agr;≦90°. In the deposition and patterning of another film thereon, breaks and remaining film can be thereby prevented because the both sides of the plating film is not reversely tapered at least. As a result, in the formation of new metal lines on the metal interconnections, the new metal lines can be formed without a break. Besides, in the patterning of a new film on the metal interconnections, remaining film that would be caused by faulty etchi
Chikama Yoshimasa
Izumi Yoshihiro
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