Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2006-08-01
2006-08-01
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S393000, C438S250000, C438S239000
Reexamination Certificate
active
07084042
ABSTRACT:
A Metal-Insulator-Metal (MIM) capacitor structure and method of fabricating the same in an integrated circuit improve capacitance density in a MIM capacitor structure by utilizing a sidewall spacer extending along a channel defined between a pair of legs that define portions of the MIM capacitor structure. Each of the legs includes top and bottom electrodes and an insulator layer interposed therebetween, as well as a sidewall that faces the channel. The sidewall spacer incorporates a conductive layer and an insulator layer interposed between the conductive layer and the sidewall of one of the legs, and the conductive layer of the sidewall spacer is physically separated from the top electrode of the MIM capacitor structure. In addition, the bottom electrode of a MIM capacitor structure may be ammonia plasma treated prior to deposition of an insulator layer thereover to reduce oxidation of the electrode. Furthermore, a multi-rate etching process may be used to etch the top electrode and insulator layer of an MIM structure, using a first, higher rate to perform an anisotropic etch up to a point proximate an interface between the conductive and dielectric materials respectively defining the top electrode and insulator layer of the MIM structure, and then using a second, lower rate to perform an anisotropic etch to a point proximate an etch stop layer defined on the bottom electrode of the MIM structure.
REFERENCES:
patent: 5780115 (1998-07-01), Park et al.
patent: 5895239 (1999-04-01), Jeng et al.
patent: 6177305 (2001-01-01), Hornback et al.
patent: 2003/0013007 (2003-01-01), Kaun
Olewine Michael
Saiz Kevin
Koninklijke Philips Electronics , N.V.
Trinh Michael
Zawilski Peter
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