Metal gate engineering for surface P-channel devices

Details Metal gate engineering for surface P-channel devices Metal gate engineering for surface P-channel devices

2008-05-06

2008-05-06

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S288000, C257S350000, C257SE21006, C257SE21632, C257SE21637, C257SE29161

Reexamination Certificate

active

11371657

ABSTRACT:
A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of producing the same. Using nitrogen implantation or plasma annealing, a low work function W (or CoSix)/TaSixNy/GOx/Si gate stack is formed in the NMOS regions while a high work function W (or CoSix)/Ta5Si3/GOx/Si gate stack is formed in the PMOS regions. The improved process also eliminates the need for a nitrided GOx which is known to degrade gm(transconductance) performance. The materials of the semiconductor devices exhibit improved adhesion characteristics to adjacent materials and low internal stress.

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