Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
2002-01-07
2004-02-24
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S491000, C438S592000, C438S593000, C438S594000, C257S407000
Reexamination Certificate
active
06696345
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor manufacturing and more specifically to a metal gate electrode and its method of fabrication.
2. Discussion of the Related Art
A conventional MOS transistor is shown in FIG.
1
. On a substrate
110
, usually silicon, rests a thin gate dielectric layer
112
, usually made of, but not limited to silicon dioxide. Upon the thin gate dielectric layer
112
, is a gate electrode
120
, an electrically conductive material. Together the thin gate dielectric layer
112
and the gate electrode form a gate structure
122
. Adjacent to the gate structure
122
are spacers
130
, made of a dielectric material. The spacers
130
are aligned directly over shallow junctions
128
of source
124
and drain
126
. The source
124
and drain
126
have deeper regions
132
and
134
, over which lays a silicide
136
, which subsequently can be coupled to metal interconnect lines that run throughout the integrated circuit. Spacers
130
separate the gate structure from the silicide to prevent silicide formation on walls of the gate electrode
120
.
When the transistor is in use, the gate structure is electrically charged and a channel region
138
forms beneath the gate allowing current to flow from the source to the drain. Thus, the gate electrode
120
must be an electrically conductive material. Doped polysilicon is the material of choice. In conventional methods of MOS transistor fabrication, the gate structure is formed before the source and drain regions are doped to act as a protective mask to the channel region. The doped polysilicon will prevent the dopants from reacting with the channel region of the underlying substrate. When a charge of the correct polarity is applied to the electrode, the channel region electrically inverts and becomes a conductive path between the source and drain regions. However, polysilicon has its drawbacks. One drawback is polydepletion, or voltage leakage. Another drawback is that polysilicon is highly resistive and therefore presents current flow-problems.
Metal is another material used for the gate electrode. Metal has various advantages over polysilicon as a gate electrode material. For instance, metal allows for excellent current flow and metal has less voltage depletion problems than polysilicon. However, metal too has its drawbacks. Some metals, such as Ti and Ni, are highly diffusive and act as contaminants within the channel region, particularly during the high temperature conditions required for dopant activation of the source/drain implant. Also, certain work functions are required that allow MOS transistors to work optimally, and it is more difficult to manipulate the work function of metals than it is to manipulate the work function of polysilicon. Furthermore, metals are difficult to etch properly. Dry-etch methods are too harsh on underlying Si substrate while wet-etch methods can excessively undercut the sidewalls of the gate electrode.
Some recent methods have attempted to solve some of these problems by combining the conventional methods of forming the transistor, with polysilicon as the gate electrode during doping, with the additional steps of completely etching out the polysilicon after doping and replacing it with a metal. However, this replacement process is complex and can easily result in costly errors if not done correctly. Therefore, it would be advantageous to have a process of making a metal gate electrode, but without the complexity of the current replacement process.
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Chau Robert
Doczy Mark
Doyle Brian
Kavalieros Jack
Blakely , Sokoloff, Taylor & Zafman LLP
Fahmy Wael
Intel Corporation
Rao Shrinivas H.
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