Metal contact scheme using selective silicon growth

Details Metal contact scheme using selective silicon growth Metal contact scheme using selective silicon growth

1999-12-17

2001-04-03

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S096000, C438S098000, C438S166000, C438S149000, C136S246000, C136S244000, C136S249000

Reexamination Certificate

active

06210991

ABSTRACT:

INTRODUCTION
The present invention relates generally to the field of photovoltaic devices and in particular the invention provides a new method of forming contacts to such devices.
BACKGROUND OF THE INVENTION
There has been an ongoing tendency in the Photovoltaic Industry, to continually reduce silicon substrate thicknesses. Improved techniques, such as the introduction of wire sawing has had a big impact in terms of producing thinner substrates with smaller kerf losses. However, back contact formation presents some problems with thinner substrates with the effective rear surface recombination velocity (RSRV) becoming of relative greater importance. Few, if any, current commercial techniques have good enough rear surface passivation (low enough RSRV) to prevent performance loss with thinner devices.
One alternative approach which has been considered from time to time over the past decade, is to use simple abrasion of the rear surface to expose the pyramid peaks of the rear surface texturing, therefore potentially facilitating contact to the underlying p-type material. Some of these ideas were published in the mid 1980's (Wenham, PhD thesis, The University of New South Wales, 1986, P171), although a suitable technology/processing sequence for the implementation of the ideas, has not previously been identified. One of the main reasons for this is linked to the preference for using a rear n-type layer for both simplicity (since it can be simultaneously formed with the front n-type layer) and performance enhancement (via a lower effective RSRV). However, problems occur when trying to penetrate through the n-type layer to the p-type underlying material via a boron diffusion. Furthermore, the high temperatures associated with boron diffusion can often damage or degrade commercial substrates.
Silicon has a very high mobility in aluminium, even at temperatures well below the aluminium/silicon eutectic temperature of 577° C. It has been known for some time that amorphous silicon can penetrate through an aluminium layer and epitaxially grow or deposit onto a crystalline silicon surface on the opposite side of the aluminium, at temperatures well below the eutectic temperature (Majni and Ottavian; Applied Physics letters, Vol 51., No. 2, Jul. 15, 1977 pp 125-126). This effect is evident whether the crystalline silicon is mono-crystalline or poly-crystalline. The same end results are achieved in the event that the positions of the aluminium and amorphous silicon layers are reversed with the silicon again initially penetrating into the aluminium when heated prior to epitaxially growing on the newly exposed crystalline silicon surface. Similar results have also been observed for germanium.
Based on this rather extraordinary mechanism for solid phase epitaxial growth at low temperature, a new contacting scheme for crystalline devices is proposed whereby the above growth approach is used to enable p-type contacts to be made to the substrate.
This approach is particularly useful for forming p-type contacts through a rear n-type floating junction, the benefits of which are often destroyed by other low cost contacting methods, which usually short out the floating junction. The presently proposed method enables p-type contacts to be made to the substrate while simultaneously forming a rectifying junction to the rear n-type layer, thereby leaving the n-type layer isolated. The rear contact area can be restricted to about 1% of the rear surface with the remainder being well passivated by the rear floating junction in conjunction with a high quality thermal oxide or independently deposited dielectric. The low temperatures involved in this process are particularly attractive for wafers grown by the Czochralski technique with the corresponding well passivated rear surface being particularly well suited for thin Czochralski wafers in commercial production.
SUMMARY OF THE INVENTION
According to a first aspect, the present invention provides a method of forming a small area contact on a semiconductor device while simultaneously isolating a high recombination velocity metal/semiconductor interface from active regions of the device via a grown or deposited heavily doped layer, the method including the steps of:
i) forming a thin aluminium layer over a dielectric coated semiconductor material to be contacted to, where at least small regions of the semiconductor material are exposed to the aluminium through gaps or holes or openings in the dielectric layer;
ii) depositing amorphous semiconductor material over the aluminium layer;
iii) heating the device to a temperature below the eutectic temperature of the semiconductor material with aluminium during the deposition of amorphous semiconductor material or after the amorphous material is deposited, whereby semiconductor material migrates through the aluminium layer to form a crystalline layer on the surface underlying the aluminium layer, the formed layer being doped p
+
by aluminium atoms from the aluminium layer.
According to a second aspect, the present invention provides a method of forming a small area contact on a semiconductor device while simultaneously isolating a high recombination velocity metal/semiconductor interface from active regions of the device via a grown or deposited heavily doped layer, the method including the steps of:
i) forming a thin amorphous layer of like semiconductor material over a dielectric coated semiconductor material to be contacted to, where at least small regions of the semiconductor material are exposed to the amorphous layer through gaps, holes or openings in the dielectric layer;
ii) forming a thin aluminium layer over the amorphous layer;
iii) heating the device to a temperature below the eutectic temperature of the semiconductor material with aluminium, whereby semiconductor material migrates from the amorphous layer into the aluminium layer from where it forms a crystalline layer on the exposed surface of the underlying crystalline material by solid phase crystal growth, the formed layer being doped p
+
by aluminium atoms from the aluminium layer.
According to a third aspect, the present invention provides a method of forming a small area contact on a semiconductor device while simultaneously isolating a high recombination velocity metal/semiconductor interface from active regions of the device via a grown or deposited heavily doped layer, the method including the steps of:
i) making small openings in a dielectric layer of a dielectric coated semiconductor material and damaging the crystal structure of the crystalline material underlying the dielectric layer;
ii) forming a thin aluminium layer over the damaged crystalline material; and
iii) heating the device to a temperature below the eutectic temperature of the semiconductor material with aluminium, whereby semiconductor material migrates from the damaged region into the aluminium layer where it remains in solution until the underlying crystalline material is exposed at which time the silicon in solution forms a crystalline layer on the surface of the underlying crystalline material by solid phase crystal growth, the formed layer being doped p
+
by aluminium atoms from the aluminium layer.
In one advantageous form of the invention, the device includes a p-type layer or region which is being contacted to, and an n-type layer or region over the surface of the p-type layer or region and the contact is formed by opening holes in the n-type layer or region and then forming the contact as described above. Preferably, the n-type layer or region has an insulating layer over its surface and the holes are opened through both the insulating layer and the underlying n-type layer or region. Preferably, the insulating layer is an oxide layer being an oxide of the semiconductor material and preferably, the semiconductor material is silicon although the method is also suitable for use with other semiconductors such as germanium and germanium/silicon alloys.
In one embodiment, the surface over which the contact is being formed is textured and the opening of

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