Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
1997-09-30
2002-01-15
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S088000, C257S094000, C257S093000, C257S446000
Reexamination Certificate
active
06339233
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a semiconductor device, in which at least one functional semiconductor structure is assigned to a first main surface of a III-V semiconductor substrate, and in which the functional semiconductor structure is electrically insulated from a second main surface of the III-V semiconductor substrate which is opposite the first main surface.
A semiconductor device of this type is, for example, disclosed by Franklin S. Harris, Jr., Applied Optics, Vol. 27, No. 15, page 3141. That article describes a photodiode array in which a multiplicity of AlGaAs/GaAs photodiodes are monolithically integrated on a so-called semi-insulating GaAs substrate.
In addition, G. Müller, M. Honsberg, Journal of Optical Communications 6 (1985), June No. 2, Berlin, Germany, page 42, discloses a Metal Clad Ridge Waveguide (“MCRW”) laser structure which is applied to a semi-insulating GaAs substrate. The semi-insulating GaAs substrate is used to electrically insulate a plurality of monolithic integrated components from one another on the substrate. The insulating affect of semi-insulating substrates is achieved by incorporating low impurity levels into the substrates (for example Cr or C in the case of GaAs substrates, and Fe in the case of InP substrates). However, the incorporation of dopants of this type into a III-V crystal lattice entails a number of difficulties both in the production and in the handling of the lattice. It is thus, for example, very difficult to incorporate these dopants uniformly into the III-V crystal lattice and makes it considerably more difficult to produce a uniform insulation affect over the entire surface of a semi-insulating substrate. The production yield of semiconductor components having semi-insulating substrates is therefore very low, for example, in comparison with the production of semiconductor components on conductive GaAs substrates.
A further problem with the semi-insulating semiconductor substrates is the fact that their insulation effect is drastically reduced when experiencing a moderate increase in temperature because free charge carriers are produced in the semiconductor crystal.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor device and a process for the production of the device, which overcome the herein-mentioned disadvantages of the heretofore-known devices and methods of this general type, and which provides homogenous electrical insulation properties between the functional semiconductor structure disposed above the first main surface of a III-V semiconductor substrate and the second main surface of the III-V semiconductor substrate and which also provides an effective electrical insulation effect at high operating temperatures.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor device, comprising an electrically conductive III-V semiconductor substrate having mutually opposite first and second main surfaces; at least one pn junction, reverse biased during operation of the semiconductor device, and disposed above the first main surface; and at least one functional semiconductor structure disposed above the at least one pn junction, the functional semiconductor structure being electrically insulated from the second main surface of the III-V semiconductor substrate.
According to the invention an electrically conductive III-V semiconductor substrate is provided and at least one pn junction, reverse biased during operation of the semiconductor device, is disposed between the functional semiconductor structure and the III-V semiconductor substrate. That has, in particular, the advantage of providing a conductive substrate which is substantially easier to produce and therefore more cost effective than prior art semi-insulating substrates which require a more elaborate production process. The pn junction which is reverse biased during operation undertakes the electrical insulation of the functional semiconductor structure from the second main surface of the III-V semiconductor substrate.
In accordance with an added feature of the invention, the electrically conductive III-V semiconductor substrate has a charge carrier concentration of more than 1*10
15
cm−3 at room temperature.
In accordance with another feature of the invention, the electrically conductive III-V semiconductor substrate has a charge carrier concentration of between 1*10
16
cm
−3
and 1*10
19
cm
−3
at room temperature.
In a preferred embodiment of the semiconductor device according to the invention, the electrically conductive III-V semiconductor substrate has a charge carrier concentration of >1·10
15
cm
−3
at room temperature (that is to say at about 20° C.). It is particularly advantageous if the electrically conductive III-V semiconductor substrate has a charge carrier concentration of between 1·10
16
cm
−3
and 1·10
19
cm
−3
at room temperature. III-V semiconductor substrates of this type are produced in large numbers for conventional III-V semiconductor components and are therefore available at low cost.
In accordance with an addition feature of the invention, the III-V semiconductor substrate has a first conduction type, and includes a first doped III-V semiconductor layer of a second conduction type disposed between the III-V semiconductor substrate of the first conduction type and the at least one functional semiconductor structure.
In accordance with yet another added feature of the invention, there is a second doped III-V semiconductor layer of the first conduction type disposed between the at least one functional semiconductor layer and the first doped III-V semiconductor layer in such a way that the III-V semiconductor substrate, the first doped II-V semiconductor layer and the second doped III-V semiconductor layers form the at least one pn junction disposed in opposite directions.
In an advantageous configuration of the semiconductor device according to the invention, a doped III-V semiconductor substrate of a first conduction type is provided. Applied to that is a first doped III-V semiconductor layer of a second conduction type, to which a second doped III-V semiconductor layer of the first conduction type is in turn applied. The functional semiconductor structure is arranged on the second doped III-V semiconductor layer. The III-V semiconductor substrate and the first and the second doped III-V semiconductor layers together form two pn junctions of opposite directions. With a layer sequence of this type, one of the two pn junctions is always reverse biased during operation, irrespective of the conduction type possessed by a semiconductor layer of the functional semiconductor structure applied to the second doped III-V semiconductor layer.
In yet another additional feature of the invention, the at least one functional semiconductor structure is an MCRW laser structure.
In accordance with yet another feature of the invention, there are photodiode structures having a photodiode array disposed on the at least one functional semiconductor structure.
In accordance with yet another added feature of the invention, the at least one functional semiconductor structures are at least two monolithically integrated functional semiconductor structures, and the at least one pn junction is disposed between each of the at least two monolithically functional semiconductor structures and the second main surface of the electrically conductive III-V semiconductor substrate.
In accordance with yet another additional feature of the invention, the at least one pn junction is cut in an intermediate location between two of the at least two monolithically integrated functional semiconductor structures in such a way that there is no conductive electrical connection between the at least two monolithically integrated functional semiconductor structures via the III-V semiconductor substrate and inclusive of at least one of the first doped III-V semiconductor layer and the second dop
Greenberg Laurence A.
Lerner Herbert L.
Loke Steven
Stemer Werner H.
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