Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent
1997-07-11
2000-08-01
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
257778, 257758, 257759, 257760, 257763, 257765, H01L 2348, H01L 2352, H01L 2940
Patent
active
060970960
ABSTRACT:
A high density integrated circuit structure and method of making the same includes providing a first silicon substrate structure having semiconductor device formations in accordance with a first circuit implementation and metal interlevel lines disposed on a top surface thereof and a second silicon substrate structure having a second circuit implementation and metal interlevel lines disposed on a top surface thereof. The first substrate structure includes a planarized low-K dielectric disposed between the metal interlevel lines and a protective coating separating the metal interlevel lines from the low-K dielectric, the metal interlevel lines of the first silicon substrate structure have a melting temperature on the order of less than 500.degree. C. and the low-K dielectric having a dielectric K-value in the range of 2.0-3.8. The second substrate structure also includes a planarized low-K dielectric disposed between the metal interlevel lines and a protective coating separating the metal interlevel lines from the low-K dielectric, the metal interlevel lines having a melting temperature on the order of less than 500.degree. C. and the low-K dielectric having a dielectric K-value in the range of 2.0-3.8. Lastly, the first substrate structure is low temperature bonded to the second substrate structure at respective metal interlevel lines of the first and second substrate structures.
REFERENCES:
patent: 3838442 (1974-09-01), Humphreys
patent: 4596604 (1986-06-01), Akiyama et al.
patent: 4612083 (1986-09-01), Yasumoto et al.
patent: 4818728 (1989-04-01), Rai et al.
patent: 4834809 (1989-05-01), Kakihara
patent: 4902637 (1990-02-01), Kondou et al.
patent: 5426072 (1995-06-01), Finnila
patent: 5710460 (1998-01-01), Leidy et al.
patent: 5780121 (1998-07-01), Endo
patent: 5780874 (1998-07-01), Kudo
Gardner Mark I.
Hause Fred
Kadosh Daniel
Advanced Micro Devices
Saadat Mahshid
Warren Matthew E.
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