Message-oriented bank controller interface

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Details

3952002, 395885, 3642383, 3642409, 364DIG1, G06F 1300

Patent

active

054795826

ABSTRACT:
Disclosed is a message oriented interface for communication between a bank controller unit and peripheral devices, such as channel units, in digital loop transmission systems. At least four registers are used for each peripheral device. Two registers are utilized to transmit control signals, and two registers are for data transmission. An additional data register can hold the last byte read by the bank controller unit in the event of an error so the byte can be re-read. The last byte of each message, which is utilized for error detection, is the exclusive OR function of the corresponding bits in all the previous bytes of the message. A service request can be asserted by a peripheral device to the Bank Controller Unit when a control signal is present in one of the registers. Means are also provided for indicating when a register is busy.

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