Mesh parallel computer architecture apparatus and associated met

Details Mesh parallel computer architecture apparatus and associated met Mesh parallel computer architecture apparatus and associated met

1996-12-30

1998-05-12

Geckil, Mehmet B.

39580022, 395842, G06F 1300

Patent

active

057520682

ABSTRACT:
A Monolithic Synchronous Processor (MeshSP) processes data and incorporates a mesh parallel computer architecture, primarily SIMD, thereby combining high data throughput with modest size, weight, power and cost. Each MeshSP processor node utilizes a single DSP processor element, a large internal memory of at least 128k-bytes, and separately operable computational and I/O processing sections. The processor element provides data throughput of at least 120 MFlops. The processor is programmed in ANSI C and without parallel extensions. A combination of on-chip DMA hardware and system software simplifies data I/O and interprocessor communication. The MeshSP is programmed to solve a wide variety of computationally demanding signal processing problems. A functional simulator enables MeshSP algorithms to be coded and tested on a personal computer.

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