MESFET logic using integral diode level shifting

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307475, 307446, H03K 19094, H03K 19092, H03K 1902

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active

046985247

ABSTRACT:
A semiconductor logic circuit utilizing level shifting of input transistors away from a reference voltage level but shifting the output toward the reference voltage level to increase noise margin. The input signals may switch both the input transistors and the output transistors.

REFERENCES:
patent: 4400636 (1983-08-01), Andrade
patent: 4404480 (1983-09-01), Ransom et al.
patent: 4410815 (1983-10-01), Ransom et al.
patent: 4558235 (1985-12-01), White et al.
Livingstone, "Capacitor Coupling of GaAs Depletion Mode F.E.T.S", IEE Proc, vol. 127, pt. 1, No. 5, Oct. 1980.
Freeman, "Level Shifting Circuit", IBM Technical Disclosure Bulletin, vol. 18, No. 5, Oct. 1975.

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