Patent
1990-04-06
1990-11-06
James, Andrew J.
357 49, 357 50, 357 52, 357 56, H01L 2712, H01L 2704, H01L 2906, H01L 2934
Patent
active
049690264
ABSTRACT:
A semiconductor device having a monocrystalline silicon region (3) comprising a first zone (9) and an adjacent second zone (10) and laterally enclosed by a sunken oxide layer (4) and by an overlying highly doped polycrystalline silicon layer (5). The silicon layer (5) is laterally separated by an oxide layer (6) from the silicon region (3) and adjoins the first zone (9) on a narrow edge portion of the upper surface of the region (3), this zone being of the same conductivity type as the silicon layer (5). The second zone (10) is provided with an electrode layer (11). According to the invention, the silicon layer (5) is separated from the electrode layer (11) by an oxide strip (12A) formed in a self-aligned manner and at least one doped connection zone (13) having a width determined by the oxide strip (12A) is situated between the first and the second zones and located below the oxide strip (12A). The invention further relates to a method of manufacturing this device.
REFERENCES:
patent: Re31580 (1989-05-01), Kodi
patent: 4680085 (1987-07-01), Vijan et al.
patent: 4746623 (1988-05-01), Lane
Washio et al., "E 48 ps ECL in a Self-Aligned Bipolar Technology," ISSCC '87, pp. 58-59.
Maas Henricus G. R.
Van Der Velden Johannes W. A.
Van Iersel-Schiffmacher Marguerite M. C.
James Andrew J.
Meier Stephen D.
Miller Paul R.
U.S. Philips Corporation
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