Merged VLSI implementation of hardware optimized Q-Coder and sof

Details Merged VLSI implementation of hardware optimized Q-Coder and sof Merged VLSI implementation of hardware optimized Q-Coder and sof

1998-08-20

2000-07-18

Couso, Jose L.

Image analysis

Image compression or coding

G06K 936

Patent

active

060918543

ABSTRACT:
The present invention includes a method and circuit for the compression encoding and decoding of digital images. In particular, the method is directed to an improved implementation of the QM-Coder as defined in the JBIG Standard and a merged implementation of the QM-Coder as defined in the JBIG Standard with the Q-Coder as defined by the IBM ABIC standard. The improved implementation of the QM-Coder as defined in the JBIG Standard includes an improved CLEARBITS procedure. The merged implementation of the QM-Coder as defined in the JBIG Standard and Q-Coder as defined by the ABIC standard includes the sharing of hardware to reduce implementation logic.

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