Merged PMOS/bipolar logic circuits

Details Merged PMOS/bipolar logic circuits Merged PMOS/bipolar logic circuits

1985-08-28

1986-09-16

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307570, 307270, H03K 1908, H03K 19003, H03K 1716, H03K 1756

Patent

active

046124586

ABSTRACT:
Logic circuits formed of merged P-channel MOS transistors and bipolar transistors to produce a single logic gate include a plurality of P-channel MOS transistors and a pair of bipolar transistors. The logic gate circuits have low power dissipation and a large noise margin.

REFERENCES:
patent: 3541353 (1970-11-01), Seelbach et al.
patent: 3609479 (1971-09-01), Lin et al.
patent: 4301383 (1981-11-01), Taylor
patent: 4558234 (1985-12-01), Suzuki et al.

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