Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2000-11-08
2001-09-11
Wong, Peter S. (Department: 2838)
Electricity: power supply or regulation systems
Self-regulating
Using a three or more terminal semiconductive device as the...
C323S316000
Reexamination Certificate
active
06288525
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electronic circuits, specifically to band-gap voltage reference circuits.
BACKGROUND
Band-gap voltage regulators are typically used to provide substantially constant reference voltages in environments subject to temperature fluctuation. Generally, band-gap circuits develop a voltage proportional to the difference between base-to-emitter voltages, &Dgr;V
BE
, of two transistors to compensate for the temperature variation in the transistor base-emitter voltage to develop a temperature compensated output voltage. Because &Dgr;V
BE
is small (e.g., less than 100 mV), it is amplified to compensate the temperature variation in V
BE
. A disadvantage of amplifying &Dgr;V
BE
is that circuit noise is also amplified.
In U.S. Pat. No. Re. 35,951, issued to Ganesan et al., in an attempt to reduce noise, transistors are stacked to reduce the amount of amplification needed. Stacking transistors reduces the amplification needed and also reduces noise because, the &Dgr;V
BE
's add directly and the noise from each transistor adds on a power basis. Because power is proportional to voltage squared, the ratio of the output voltage (after amplification) to noise increases (improves) by the square root of the number of stacked transistors.
Greater &Dgr;V
BE
values have been produced by stacking like transistor types. For example, stacking NPN transistors, stacking PNP transistors, and amplifying the difference in the cumulative &Dgr;V
BE
's of each stack. This is illustrated in FIG.
1
. In
FIG. 1
, NPN transistors are stacked together and PNP transistors are stacked together. For example, NPN transistors Q
29
, Q
31
, Q
33
, and Q
35
are stacked together and PNP transistors Q
21
, Q
23
, Q
25
, and Q
27
are stacked together.
A problem with this approach is that the minimum supply voltage needed to power a stack increases as the number of transistors in the stack increases. As previously stated, increasing the number of transistors in a stack decreases noise, but increasing the number of transistors in a stack also increases the minimum supply voltage required. Thus, a need exists for a low noise band-gap reference voltage that operates with a low supply voltage.
SUMMARY OF THE INVENTION
An electronic circuit comprises a plurality of transistor pairs, having a first transistor pair and a last transistor pair. Each transistor pair comprises a first transistor having a first emitter, a first collector, and a first base, and a second transistor having a second emitter, a second collector, and a second base. The first transistor of each transistor pair is a NPN bipolar transistor and the second transistor of each transistor pair is a PNP bipolar Lransistor. Each second emitter is capable of being electrically coupled to a first current supply means. Each first emitter is capable of being electrically coupled to a second current supply means. Each first collector is capable of being electrically coupled to a first voltage, and each second collector is capable of being electrically coupled to a second voltage. Within each pair, the first base is electrically coupled to the second emitter. Each second base, with the exception of the second base of the first pair and the second base of the last pair, is electrically coupled to the first emitter of another one of the plurality of transistor pairs, respectively. The second base of the first pair is electrically coupled to the second collector of the first pair, and the second base of the last pair is electrically coupled to the second collector of the last pair. The electronic circuit also comprises a differential amplifier. The differential amplifier has a first input terminal, a second input terminal, and an output terminal. The first input terminal is electrically coupled to one of two first emitters not electrically coupled to one of the second bases. The second input terminal is electrically coupled to the other one of two first emitters not electrically coupled to one of the second bases. The output terminal is electrically coupled to the second base and the second collector of either the last transistor pair or the first transistor pair.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
REFERENCES:
patent: Re. 35951 (1998-11-01), Ganesan et al.
patent: 4339707 (1982-07-01), Gorecki
patent: 4595874 (1986-06-01), Hein et al.
patent: 4897595 (1990-01-01), Holle
patent: 5568045 (1996-10-01), Koazechi
patent: 5867012 (1999-02-01), Tuthill
patent: 6031365 (2000-02-01), Sharpe-Geisler
Paul R. Gray and Robert G. Meyer (University of California, Berkeley),Analysis and Design of Analog Integrated Circuits, ® 1977, 1984, by John Wiley & Sons, Inc., Canada and USA, pp. 289-296 (with cover page and copyright page, total 10 pages).
Agere Systems Guardian Corp.
Duane Morris & Heckscher LLP
Oriti Joseph F.
Vu Bao Q.
Wong Peter S.
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