Merged buffer signal switch

Details Merged buffer signal switch Merged buffer signal switch

1995-12-29

1999-01-19

Olms, Douglas W.

Multiplex communications

Data flow congestion prevention or control

Flow control of data transmission through a network

370229, H04J 314

Patent

active

058621288

ABSTRACT:
A signal switch with merged buffer architecture has multiple input ports connected to a circuit switch matrix which partially sorts the input signals based on output port destination. The circuit switch matrix is connected to multiple merged buffers, each in turn connected to a corresponding output port and feedback. Input signals entering the circuit switch matrix are normally sent to the buffer attached to the destination output port of the input signal, but, if more than one input signal is contending for an output port, all but the first contending input signal are misrouted to merged buffers that are not busy. The location in memory of all of the correctly routed and misrouted input signals in the switch is tracked by a control, which also routes input signals to their output port destinations from the merged buffers, and reroutes misrouted input signals to the correct buffers. The control does not reroute a misrouted signal until its intended buffer is no longer busy, so that each input signal is rerouted at most once. The control can also track the priority, sequence number, and output port destination of each input signal, in order to give preference to the higher priority input signals going to a particular output port. Buffer overflow can be minimized and switch resources more efficiently utilized by denying rerouted input signals access to a output buffer until the number of cells potentially waiting in that output buffer has dropped below a predetermined threshold. Buffer usage is balanced across the switch by changing the order in which buffers receive misrouted input signals. At the onset of congestion, signals are discarded when necessary at predetermined priority-dependent buffer signal occupancy thresholds. Multicasting can be handled by initially treating a multicast signal as a misrouted signal. The multicast signal is first routed to a merged buffer which did not receive a correctly routed signal, then it is rerouted simultaneously to all of the merged buffers corresponding to its output port destinations, so that all signals can be then sent to the appropriate output ports during a subsequent time period.

REFERENCES:
patent: 4603416 (1986-07-01), Servel et al.
patent: 4754451 (1988-06-01), Eng et al.
patent: 4760570 (1988-07-01), Acampora et al.
patent: 4829475 (1989-05-01), Ward et al.
patent: 4862412 (1989-08-01), Fried et al.
patent: 5130947 (1992-07-01), Reed
patent: 5268896 (1993-12-01), Pauwels
patent: 5301055 (1994-04-01), Bagchi et al.
patent: 5345229 (1994-09-01), Olnowich et al.
patent: 5367520 (1994-11-01), Cordell
patent: 5404537 (1995-04-01), Olnowich et al.
patent: 5406554 (1995-04-01), Parry
patent: 5471468 (1995-11-01), Sandin et al.
patent: 5506809 (1996-04-01), Csoppenszky et al.
patent: 5511070 (1996-04-01), Lyles
patent: 5513134 (1996-04-01), Cooperman et al.
patent: 5517495 (1996-05-01), Lund et al.
patent: 5519698 (1996-05-01), Lyles et al.
patent: 5546391 (1996-08-01), Hochschild et al.
patent: 5574875 (1996-11-01), Stansfield et al.
patent: 5577035 (1996-11-01), Haylor et al.
patent: 5583861 (1996-12-01), Holden
patent: 5590123 (1996-12-01), Lyles et al.
patent: 5612951 (1997-03-01), Yu et al.
patent: 5636210 (1997-06-01), Agrawal
Schultz et al, "CAM-Based Single-Chip Shared Buffer ATM Switch," 1994 International Communication Conference pp. 1190-1195 (1994).
Schultz et al., "Fully-Parallel Multi-Megabit Integrated Cam/Ram Design", 1994 IEEE, pp. 46-51 (1994).

Affiliated with

Also associated with

Rating

Merged buffer signal switch does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Merged buffer signal switch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Merged buffer signal switch will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1252274