Merged bipolar/field-effect transistors

Details Merged bipolar/field-effect transistors Merged bipolar/field-effect transistors

1985-09-17

1988-03-01

Wojciehowicz, Edward J.

357 34, 357 38, 357 44, 357 45, 357 46, 357 86, H01L 2702

Patent

active

047290072

ABSTRACT:
A semiconductor device having the advantages of bipolar transistor characteristics (such as a low ON resistance) and of FET characteristics (such as a rapid turn-off) can be obtained by integrating and merging together in one semiconductor body a bipolar transistor T and two or more insulated-gate FETs T1 to T4. A lateral FET T1 is formed by providing a drain region adjacent to the base region of the bipolar T and an insulated gate overlying an intermediate channel area. A further FET T3 which is of complementary conductivity type to T1 may have a source region provided in the drain region and an insulated gate over a channel area between the source region and the emitter region of T. These insulated gates are connected together, for example as a common gate grid, so permitting T1 to be turned on to extract charge from the base region of the bipolar T during turn off when T3 is turned off to interrupt the terminal connection to the emitter region of bipolar T. A vertical insulated-gate field-effect transistor T4 having the same source region as T3 may be formed in parallel with the bipolar transistor T to share the main current path through the device. A very compact power device structure can be obtained with a two-dimensional array of alternating base regions and drain regions.

REFERENCES:
patent: 4441117 (1984-04-01), Zommer
patent: 4547791 (1985-10-01), Roger et al.
patent: 4611235 (1986-09-01), Bhagat

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