Merge and copy bit block transfer implementation

Details Merge and copy bit block transfer implementation Merge and copy bit block transfer implementation

1986-01-17

1988-08-09

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1202

Patent

active

047632518

ABSTRACT:
A memory circuit including a bit addressable binary data memory in which the data is stored in a plurality of dimensional directions and a circuit for accessing a group of the data in the memory in at least two of the dimensional directions and for moving the data to a different dimensional location while maintaining the data within the group. Also provided is a means for accessing the data by incrementally or decrementally addressing the data in at least one of the directions. The accessing circuitry is further used to perform bit block transfers of data within the memory. The accessing circuit also provides for horizontal or vertical access during a read operation while orthogonally rotating the data by 90 degrees during a following write operation.

REFERENCES:
patent: 3973245 (1976-08-01), Belser
patent: 4090174 (1978-05-01), Van Voorhis
patent: 4296476 (1981-10-01), Mayer et al.
patent: 4460958 (1984-07-01), Christopher et al.
patent: 4481578 (1984-11-01), Hughes et al.
patent: 4495567 (1985-01-01), Treen
patent: 4667308 (1987-05-01), Hayes et al.

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