MEMS device with integrated via and spacer

Details MEMS device with integrated via and spacer MEMS device with integrated via and spacer

2011-01-04

2011-01-04

Spector, David N (Department: 2873)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C438S667000

Reexamination Certificate

active

07863752

ABSTRACT:
A MEMS device and fabrication method are disclosed. A bottom substrate having an insulating layer sandwiched between an upper layer and a lower layer may be bonded to a device layer. One or more portions of the upper layer may be selectively removed to form one or more device cavities. Conductive vias may be formed through the lower layer at locations that underlie the one or more device cavities and electrically isolated from the lower layer. Devices may be formed from the device layer. Each device overlies a corresponding device cavity. Each device may be connected to the rest of the device layer by one or more corresponding hinges formed from the device layer. One or more electrical contacts may be formed on a back side of the lower layer. Each contact is electrically connected to a corresponding conductive via.

REFERENCES:
patent: 6984917 (2006-01-01), Greywall et al.
patent: 7015060 (2006-03-01), Kubena et al.
patent: 2002/0046985 (2002-04-01), Daneman et al.
patent: 2002/0146200 (2002-10-01), Kudrle et al.
patent: 2008/0122031 (2008-05-01), DeNatale et al.
patent: 2008/0157339 (2008-07-01), Suilleabhain et al.
patent: 2008/0157361 (2008-07-01), Wood et al.
PCT International Search Report dated Apr. 16, 2010 issued for International Patent Application No. PCT/US2010/024621.

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