Memory with spatially encoded data storage

Details Memory with spatially encoded data storage Memory with spatially encoded data storage

2008-05-13

2008-05-13

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Powering

Conservation of power

C365S194000, C365S189080

Reexamination Certificate

active

11321366

ABSTRACT:
In some embodiments, the invention provides a chip with at least one memory circuit that comprises a majority voter circuit with first and second digitally controlled variable delay elements. The first delay element is controlled by data bits that are to be written to a portion of the memory circuit. The majority voter circuit determines if the data bits are to be inverted prior to being written into the memory circuit portion.

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Mark Anders, U.S. Appl. No. 11/094,811, filed on Mar. 31, 2005.

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