Memory with multiple erase modes

Details Memory with multiple erase modes Memory with multiple erase modes

1994-09-15

1996-05-14

Nguyen, Viet Q.

Static information storage and retrieval

Floating gate

Particular connection

36518527, 365195, 36518518, 36518533, 365236, 3652385, G11C 700

Patent

active

055174531

ABSTRACT:
An electrically-erasable, electrically programmable read-only memory (EEPROM) with multiple erase modes identifies sections of memory cells that have not received a write operation subsequent to the most recent erase operation and inhibits erasure of the memory cells in such sections. An indicator column is formed from indicator memory cells added to each section. During a write operation in which a section is first erased and then programmed, the EEPROM reads the indicator memory cell added to the section and inhibits the erase of the section if the memory cells in the section are in an erased state.

REFERENCES:
patent: 4698750 (1987-10-01), Wilkie et al.
patent: 5212663 (1993-05-01), Leong
patent: 5341339 (1994-08-01), Wells
patent: 5357475 (1994-10-01), Hasbun et al.
patent: 5369616 (1994-11-01), Wells et al.
patent: 5371702 (1994-12-01), Nakai et al.

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