Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-06-20
2004-03-02
Mai, Son L. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185200
Reexamination Certificate
active
06700819
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present disclosure concerns non-volatile memories and, more particularly but not exclusively, non-volatile memories in which the reading of a cell and the recognition of its contents are obtained by means of comparison with the state of a reference cell.
2. Description of the Related Art
It is well known that each memory cell of a non-volatile memory comprises essentially of a field-effect P- or N-channel (preferably N-channel) transistor that is provided not only with a control and selection gate, but also with an insulated gate, the so-called floating gate, by means of which it is possible—using various techniques that depend on the type of memory involved—to inject electric charges that remain confined in the floating gate even for long periods of time and determine the electric behavior of the cell.
The removal of these electric charges from the floating gate can be obtained by means of various techniques that again depend on the type of memory and are not of immediate interest for our present purposes, exposure to UV rays being a case in point.
As a general rule, whenever the floating gate is in a neutral or virgin state, i.e., devoid of charges, the cell channel will not be conductive, though a modest and appropriately biased voltage Vgsv applied to the control and either wholly or partly superposed on the floating gate will be quite sufficient to make the cell conduct.
In the presence of electric charges on the floating gate, on the other hand, the transistor will be strongly biased in interdiction and a more substantial voltage Vgsp will therefore have to be applied to the control gate before it can be rendered conductive.
If it were possible to impose on the systems a working voltage that will always and securely be intermediate between Vgsv and Vgsp, it would be easy to distinguish a virgin cell from a programmed cell, because one could then advantageously observe the conduction or non-conduction state of the cell under consideration.
In practice, however, the great variability of the supply voltages of the various systems that are usually applied to the gates of the NV cells renders this approach far from reliable, because the state of conduction or non-conduction will not be preserved for supply voltages in excess of Vgsp.
Recourse has therefore been had to differential reading systems in which the reading of a memory cell is always associated with the reading of a reference cell of which the state is known and corresponds to the neutral or virgin state.
Though this approach makes it easy to recognize when a memory cell has been programmed, i.e., is in a non-neutral state, the identification of the neutral state of a memory cell remains uncertain on account of the relative similarity (apart from the inevitable dispersion of the electric behavior of the various devices) of the characteristics of the reference cell and the matrix cell under observation, both of which are virgin.
Various measures have therefore been proposed to overcome this limit, among them the current-offset differential reading system, the threshold translation system and, lastly, the one that on account of its simplicity and reliability is also the most commonly used in practice, namely the so-called unbalanced-load differential reading system.
The unbalanced-load reading system eliminates the uncertainty in recognizing the virgin state of a memory cell even at low voltages, but has the grave drawback that, given limited threshold jumps, it introduces uncertainties as regards the recognition of the programmed state of a cell when there is an increase in the supply voltage that is normally used also for cell selection.
In fact, what happens (see
FIG. 3
) is that at sufficiently high working voltages, given the intersection of the reference characteristic and the characteristic of the programmed cells, the system will invariably produce a wrong reading, since the programmed cell will now conduct more than the reference cell, just as in the case of a virgin cell.
In traditional NV memory circuits, where the threshold jumps between virgin cells and programmed cells are high (more than 3V), this problem will typically occur outside the working range (4-6 V) of the memory.
But there are also NV memories, the N-ROM memory being a case in point, that permit only limited threshold jumps (1.5V); consequently, they do not enjoy this advantage and therefore fail in their actual working range.
BRIEF SUMMARY OF THE INVENTION
This limitation is overcome by the non-volatile memory with the improved differential reading system in accordance with an embodiment of the present invention, where the load unbalancing method is combined with a load rebalancing method above an appropriately chosen and—in the limit—variable threshold voltage with the characteristics of the memory cells. This threshold is chosen in such a manner that, no matter how greatly the supply and control voltage of the memory cells may exceed the conductivity threshold voltage, the characteristic of the reference system, generated by a reference circuit, will always assume an intermediate value that can be clearly distinguished from the characteristic corresponding to the reading of a virgin cell or the reading of a programmed cell.
In this way, no matter what the supply voltage of the memory and its degree of ageing, the proposed system eliminates all uncertainty as regards the recognition of the neutral or programmed state of the memory cells.
REFERENCES:
patent: 4949307 (1990-08-01), Campardo
patent: 5218570 (1993-06-01), Pascucci et al.
patent: 5258959 (1993-11-01), Dallabora et al.
patent: 5386388 (1995-01-01), Atwood et al.
de Guzman Dennis M.
Jorgenson Lisa K.
Mai Son L.
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
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