Memory with common read/write data line and write-in latch circu

Details Memory with common read/write data line and write-in latch circu Memory with common read/write data line and write-in latch circu

1977-04-25

1978-12-19

Hecker, Stuart N.

Static information storage and retrieval

Addressing

365189, G11C 800, G11C 706

Patent

active

041309006

ABSTRACT:
A latch circuit is provided on the input side of write-in circuit of a semiconductor memory device which is so formed that a common data line is used for data writing-in and data reading-out. Write-in data read serially into the latch circuit in a word unit is temporarily stored and held, so that the data is written simultaneously into various memory cells for in column units of the memory array.

REFERENCES:
patent: 3906461 (1975-09-01), Cappon
Geilhufe, More Bits/Chip Leads to Economical Semiconductor Memory Systems, EDN, 02201973, pp. 76-81.
Schlageter et al., Two 4k Static 5-v RAM's, IEEE Journal of Solid-State circuits, vol. SC-11, No. 5, 101976, pp. 602-609.

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