Memory using multiple supply voltages

Details Memory using multiple supply voltages Memory using multiple supply voltages

2009-06-19

2011-11-15

Dinh, Son (Department: 2824)

Static information storage and retrieval

Powering

C365S189110, C365S189090

Reexamination Certificate

active

08059482

ABSTRACT:
A memory has a method of operating that includes performing operations of a first type and a second type. A first voltage is coupled to a power supply node of a first memory cell of a memory array during a first operation of the first type. The first voltage is decoupled from the power supply node in response to terminating the first operation of the first type so as to allow the power supply node to drift. If the power supply node drifts to a second voltage, a power supply source is coupled to the power supply node. This is useful in reducing power in the circuit that produces the first voltage.

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Hamzaoglu, Fatih et al.; “A 3.8 Ghz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology”; IEEE Journal of Solid-State Circuits; Jan. 2009; pp. 148-154; vol. 44, No. 1; IEEE.
Zhang, Kevin et al.; “A 3GHz 70-Mb SRAM in 65-nm CMOS Technology With Integrated Column-Based Dynamic Power Supply”; Jan. 2006; pp. 146-151; vol. 41, No. 1; IEEE.

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