Memory unit including an address generator

Patent

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Details

39542108, 395896, 39520007, G06F 1200

Patent

active

057375704

ABSTRACT:
A memory unit includes a plurality of address ranges whose size and number are freely variable. For each address range, one address value is stored, as well as a start and an end address. The memory unit has an address generator which counts through the addresses from the start address to the end address. The start address and the end address are stored in an address register. By way of a code, the start and end addresses are called up in the address register and a current address value is called up in the address generator. The address generator counts through the address range until it reaches the end address.

REFERENCES:
patent: 4482951 (1984-11-01), Swaney et al.
patent: 4658349 (1987-04-01), Tabata et al.
patent: 4723223 (1988-02-01), Hanada
patent: 5003509 (1991-03-01), Bosnyak
patent: 5195088 (1993-03-01), Urbansky

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