Memory system with two clock lines and a memory device

Details Memory system with two clock lines and a memory device Memory system with two clock lines and a memory device

2007-02-06

2007-02-06

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S233500, C711S167000, C711S169000, C710S106000, C710S107000, C713S400000

Reexamination Certificate

active

10955177

ABSTRACT:
The present invention relates to a memory system having a memory device with two clock lines. One embodiment of the present invention provides a memory system comprising at least one memory device, a memory controller to control operation of the memory device, a first clock line which extends from a write clock output of the memory controller to a clock port of the memory device to provide a clock signal to the memory device, and a second clock line which extends from the clock port of the memory device to a read clock input of the memory controller to forward the clock signal applied to the clock port of the memory device back to a read clock input of the memory controller. The memory device may further comprise a synchronization circuit adapted to receive the clock signal from the memory controller and to, provide an output data synchronized to the forwarded clock signal.

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