Memory system with improved efficiency of data transfer...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S189050, C710S013000, C710S052000, C710S053000, C710S066000, C711S100000, C711S117000, C711S118000

Reexamination Certificate

active

06882568

ABSTRACT:
The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner.

REFERENCES:
patent: 5603062 (1997-02-01), Sato et al.
patent: 6016549 (2000-01-01), Matsushiba et al.
patent: 6266282 (2001-07-01), Hwang et al.
patent: 6522581 (2003-02-01), Takata et al.

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