Memory system handling a plurality of bits as a unit to be proce

Details Memory system handling a plurality of bits as a unit to be proce Memory system handling a plurality of bits as a unit to be proce

1983-10-21

1985-12-24

Fears, Terrell W.

Static information storage and retrieval

Addressing

365233, G11C 1300

Patent

active

045610720

ABSTRACT:
An addressing system for a memory circuit which reads out plural locations simultaneously and then arranges the readout information into a desired sequence or format.

REFERENCES:
patent: 3643236 (1972-02-01), Kolankowsky
patent: 3753242 (1973-08-01), Townsend
patent: 3772658 (1973-11-01), Sarlo

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