Memory system for processing digital video signal

Details Memory system for processing digital video signal Memory system for processing digital video signal

1997-04-07

1999-08-03

Chauhan, U.

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

345521, 348715, 36523001, G06F 1206

Patent

active

059331593

ABSTRACT:
A memory system for processing a digital video signal capable of accessing data in block units includes a detector circuit discriminating whether the memory system is in a reading/writing operation in one of an integer pel mode and a half pel mode. A controller circuit is coupled to the detector circuit and controls access of data in units of m.times.n bit block when the memory system is determined to operate in the integer mode by the detector circuit. The controller circuit controls access of data in units of (m+1).times.(n+1) bit block when the memory system is determined to operate in the half pel mode of a reading operation.

REFERENCES:
patent: 5430684 (1995-07-01), Kim et al.
patent: 5461423 (1995-10-01), Tsukagoshi
patent: 5550591 (1996-08-01), Rim et al.
patent: 5581310 (1996-12-01), Vinekar et al.
patent: 5619282 (1997-04-01), Song
patent: 5805227 (1998-09-01), Gi-Hwan

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