Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2007-01-23
2007-01-23
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S233100, C365S221000, C326S041000, C331S053000
Reexamination Certificate
active
11114807
ABSTRACT:
A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference clock signal to a memory control device. The serial interfaces are coupled to other memory devices or memory control devices. A method of transferring data within a memory system using serial interfaces is also disclosed. The method includes performing clock multiplication on a reference clock to provide a multiplied clock, using the multiplied clock to serialize and transmit data onto a serial interface, recovering data from the seal interface, using the reference clock to determine an initial frequency for use by clock and data recovery module, using the data recovered from the serial interface to determine a phase and final frequency of a recovered clock, and using the recovered clock to de-serialize received serial data into parallel data words.
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Black David
Boecker Charles
Groen Eric
Hoelscher Aaron
Irwin Scott
Magnalynx
Toler Schaffer LLP
Wendler Eric J.
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