Memory system and associated method for disabling address buffer

Static information storage and retrieval – Magnetic bubbles – Guide structure

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395400, 365 52, 36523008, 364DIG1, G06F 1300

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active

052416437

ABSTRACT:
A memory circuit for use in a data processing system is accessed by address signals and includes interconnection circuitry for at least one memory module. The memory circuit further includes an address buffer for transmitting the address signals to the interconnection circuits if and only if the at least one memory module is present. A line interconnects the output enable pin of an address buffer to a grounded PRESENT (PRES) pin on a (single in-line memory module (SIMM) when it is installed in a socket. The line to the address buffer enable pin includes a pull-up resistor portion so that the address buffer is disabled unless a SIMM is connected to the socket.

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