Memory system

Static information storage and retrieval – Addressing

Reexamination Certificate

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Details

C365S230030, C365S185110, C711S103000, C711S202000, C711S203000, C711S209000, C711S221000

Reexamination Certificate

active

07046574

ABSTRACT:
A memory system having a semiconductor storage device divided into plural areas, in which information becomes accessible by specifying an absolute physical address, and a control section for controlling the semiconductor storage device is provided. The control section receives a designating signal for designating one area out of the plural areas of the semiconductor storage device and a relative physical address independent by each area and specifies the absolute physical address by adding an offset address corresponding to the area designated by the designating signal to the relative physical address so that the semiconductor storage device is accessed.

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patent: 1 134 662 (2001-09-01), None
US 6,781,913, 8/2004, Furukawa (withdrawn)
European Search Report; Dated: Jun. 24, 2004.

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