Memory system

Static information storage and retrieval – Addressing – Sync/clocking

Patent

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Details

365193, G11C 1140, G11C 1300

Patent

active

041640314

ABSTRACT:
Disclosed is a memory system for storing digital data; the memory system of the type which may be implemented, for instance, in an electronic microprocessor or calculator system. The memory comprises an array of transistor memory cells arranged in columns and rows. Column conductors are provided for supplying digital information to each column of such cells and row conductors are provided for enabling each row of cells to store digital information being received on the column conductors. A commutator is provided for successively supplying enabling signals to the row conductors and another commutator is provided for successfully connecting the column conductors with an input/output bus in the memory system. The provision of the commutators with the array of memory cells causes the data, when stored as a word of data, to occupy a register arranged in essentially a diagonal pattern through the array.

REFERENCES:
patent: 3719932 (1973-03-01), Cappon
patent: 3731287 (1973-05-01), Seely et al.
patent: 3763480 (1973-10-01), Wetmer
patent: 3893088 (1975-07-01), Bell
patent: 3914750 (1975-10-01), Hadden
patent: 4094009 (1978-06-01), Schneider

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