Memory storage verification system for use in an integrated circ

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371 511, 371 212, G06F 702, H04L 100

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054616344

ABSTRACT:
A memory storage verification device for use with a memory storage unit in which electrical signals stored in selected memory locations are periodically accessed by an external processor. The device includes a register for storing the address of a memory location in the memory storage unit having a stored electrical signal, a comparator for comparing the address stored in the register with an electrical signal from the memory storage unit providing the address of the memory location being accessed by the external processor, and a latch including a trigger coupled to the output port of the comparator. The input port of the latch is coupled to the memory storage unit and receives the electrical signal stored in the memory location being accessed when the trigger receives a signal from the comparator.

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