Memory storage technique for a bi-directionally programmable...

Details Memory storage technique for a bi-directionally programmable... Memory storage technique for a bi-directionally programmable...

2007-03-23

2009-08-18

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185250, C365S189060, C365S189070, C365S189080

Reexamination Certificate

active

07577028

ABSTRACT:
A memory device includes a memory array with a programming region to store data. The programming region includes a plurality of memory cells and has an associated flag bit. Logic is coupled to the memory array. The logic is to compare data stored in the programming region to a desired programmed value, and to determine a number of changing bits. The logic may further set or clear the associated flag bit, depending on the number of changing bits.

REFERENCES:
patent: 2008/0094893 (2008-04-01), Choi
patent: 2008/0144380 (2008-06-01), Youn et al.

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