Memory stacking system and method

Static information storage and retrieval – Hardware for storage elements

Reexamination Certificate

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C365S230030

Reexamination Certificate

active

07046538

ABSTRACT:
A method of forming a stacked memory module from a plurality of memory devices is provided. Each of the plurality of memory devices is modified to include a logic block for decoding a plurality of chip select signals. A first high density memory module is also provided that includes the modified memory devices and a serial presence detect device. The first high density memory module is included within an electronic system. Also, an additional method of forming a stacked memory module is provided, the method requiring modification of an address buffer to include a logic block for decoding a plurality of chip select signals. A second high density memory module is also provided that includes the modified address buffer and a serial presence detect device. The second high density memory module is included within an electronic system.

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PCT International Search Report dated Jan. 30, 2006.

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