Memory segmentation for fast fourier transform

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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10898628

ABSTRACT:
Various approaches for performing a fast-Fourier transform (FFT) of N input data elements using a radix K decomposition of the FFT are disclosed (K>=2, and N>=8). In one approach, N/K input data elements are written to respective ones of K addressable memories, and N/K*logKN passes are performed on the input data. Each pass includes reading K data elements in parallel from the K addressable memories using the respectively generated addresses, the K data elements being in a first order corresponding to the respective memories; permuting the first order of K data elements into a second order of K data elements; performing a radix K calculation on the second order of K data elements, resulting in corresponding result data elements in the second order; permuting the second order of K result data elements into the first order; and writing the K result data elements in parallel to the corresponding K addressable memories using the respective addresses.

REFERENCES:
patent: 4868776 (1989-09-01), Gray et al.
patent: 2004/0039765 (2004-02-01), Nakazuru et al.
patent: 2005/0114421 (2005-05-01), Gibb et al.
patent: 2006/0004900 (2006-01-01), Steinberg

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