Memory scanning radio receiver with separate channel data select

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Details

325455, 325464, 325470, H04B 132

Patent

active

041561961

ABSTRACT:
A radio receiver having RF, frequency converter, demodulator and audio stages, in which the frequency converter stage is connected to a local oscillator composed of a phase locked loop. The radio receiver includes a variable frequency divider inserted into the phase locked loop, a memory circuit for variably controlling the frequency dividing ratio of the frequency divider in accordance with a signal to be received, a scanning counter for supplying a read-out control signal to the memory circuit, a clock signal source for generating a clock signal, a counter control circuit for controlling supply and supply-terminating of the clock signal fed to the scanning counter, a level detecting circuit for detecting if a signal supplied to the RF stage has a level higher than a predetermined level, a switching circuit for switching a received channel, and a circuit for cutting off the clock signal fed to the scanning counter when outputs of the switching circuit and level detecting circuit are fed thereto.

REFERENCES:
patent: 3961261 (1976-06-01), Pflasterer
patent: 3999131 (1976-12-01), Fukuda et al.
patent: 4011515 (1977-03-01), Hanson
patent: 4027251 (1977-05-01), Fathauer et al.
patent: 4031473 (1977-06-01), Mitarai
patent: 4057760 (1977-11-01), Koch
Heath's Digital FM Tuner--David M. Thomas--Radio Electronics, May 1973, pp. 42-50, 98.

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