Memory rewind and reconstruction for hardware emulator

Details Memory rewind and reconstruction for hardware emulator Memory rewind and reconstruction for hardware emulator

2003-02-24

2008-10-21

Rodriguez, Paul L (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Emulation

Of peripheral device

C703S014000

Reexamination Certificate

active

07440884

ABSTRACT:
A method and apparatus for debugging circuit designs having random access memory therein. The circuit design is emulated on a hardware logic emulator. The RAM emulated by the emulator can be rewound to a previous state, and then replayed. The RAM emulated by the emulator can also be reconstructed to a state the RAM maintained at some point during a trace window.

REFERENCES:
patent: 5036473 (1991-07-01), Butts et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5425036 (1995-06-01), Liu et al.
patent: 5455929 (1995-10-01), Bosshart et al.
patent: 5475830 (1995-12-01), Chen et al.
patent: 5551013 (1996-08-01), Beausoleil et al.
patent: 5568380 (1996-10-01), Brodnax et al.
patent: 5588113 (1996-12-01), Johnson
patent: 5604889 (1997-02-01), Pickens et al.
patent: 5777489 (1998-07-01), Barbier et al.
patent: 5822564 (1998-10-01), Chilton et al.
patent: 5943490 (1999-08-01), Sample
patent: 5960191 (1999-09-01), Sample et al.
patent: 6035117 (2000-03-01), Beausoleil et al.
patent: 6051030 (2000-04-01), Beausoleil et al.
patent: 6061511 (2000-05-01), Marantz et al.
patent: 6088773 (2000-07-01), Kano et al.
patent: 6148416 (2000-11-01), Masubuchi
patent: 6446249 (2002-09-01), Wang et al.
patent: 6622263 (2003-09-01), Stiffler et al.
patent: 6766428 (2004-07-01), Saulsbury et al.
patent: 7058849 (2006-06-01), Erstad
patent: 2002/0170015 (2002-11-01), Hornung et al.
patent: 2003/0163763 (2003-08-01), DeLano
Korth, Henry, F.; Silberschatz, Abraham; “Database system concepts”, Second Edition, 1991, McGraw-Hill, pp. 323-324, section 10.4.1.
Bob Janssens et al., “The Performance of Cache-Based Error Recovery in Multiprocessors”, Oct. 1994, IEEE Transactions on Parallel and Distributed Systems, vol. 5, No. 10, pp. 1033-1043.
Nicholas S. Bowen et al., “Processor- and Memory-Based Checkpoint and Rollback Recovery”, Feb. 1993, IEEE Computer, vol. 26, Issue 2, pp. 22-31.
Michael Butler and Yale Patt, “A Comparative Performance Evaluation of Various State Maintenance Mechanisms”, 1993, Proceedings of the 26th Annual International Symposium on Microarchitecture, pp. 70-79.
K-L. Wu et al., “Error recovery in shared memory multiprocessors using private caches”, Apr. 1990, IEEE Transactions on Parallel and Distributed Systems, vol. 1, issue 2, pp. 231-240.
European Search Report; Jan. 23, 2006.

Affiliated with

Also associated with

Rating

Memory rewind and reconstruction for hardware emulator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory rewind and reconstruction for hardware emulator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory rewind and reconstruction for hardware emulator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4012197