Boots – shoes – and leggings
Patent
1991-08-07
1994-02-15
Robertson, David L.
Boots, shoes, and leggings
364DIG1, 3642408, 364243, 3642421, G06F 1314
Patent
active
052874770
ABSTRACT:
A method and apparatus to improve memory performance in a computer bus system. Memory is divided into interleaved blocks and memory addresses are mapped into block identification numbers. Master devices keep track of which parts of memory are busy by storing memory block identification numbers in local queues whenever memory is accessed. Block identification numbers are removed from local queues when the memory transaction is complete. Master devices arbitrate for access to the bus for memory transactions only if the target memory block identification number is not in the local queue.
REFERENCES:
patent: 3978451 (1976-08-01), Ito et al.
patent: 4597104 (1986-06-01), Ohki et al.
Brockmann Russell C.
Jaffe William S.
Johnson Leith L.
Hewlett--Packard Company
Robertson David L.
Winfield Augustus W.
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