Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2006-08-08
2008-09-23
Kim, Kenneth S (Department: 2111)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C711S153000
Reexamination Certificate
active
07428629
ABSTRACT:
A memory management mechanism a nodal having multiple processors in a massively parallel computer system dynamically configures nodal memory on demand. A respective variable-sized subdivision of nodal memory is associated with each processor in the node. A processor may request additional memory, and the other processor(s) may grant or veto the request. If granted, the requested memory is added to the subdivision of the requesting processor. A processor can only access memory within its own subdivision. Preferably, each subdivision contains a daemon which monitors memory usage and generates requests for additional memory.
REFERENCES:
patent: 4811216 (1989-03-01), Bishop et al.
patent: 5559980 (1996-09-01), Connors et al.
patent: 5623641 (1997-04-01), Kadoyashiki
patent: 5625836 (1997-04-01), Barker et al.
patent: 6266745 (2001-07-01), de Backer et al.
patent: 6341338 (2002-01-01), Dennie
patent: 6360303 (2002-03-01), Wisler et al.
patent: 2007/0250604 (2007-10-01), Wu et al.
Bryant Jay Symmes
Goracke Nicholas Bruce
Kolz Daniel Paul
Patel Dharmesh J.
Kim Kenneth S
Truelson Roy W.
LandOfFree
Memory request / grant daemons in virtual nodes for moving... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory request / grant daemons in virtual nodes for moving..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory request / grant daemons in virtual nodes for moving... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3986020