Boots – shoes – and leggings
Patent
1979-11-05
1982-02-16
Zache, Raulfe B.
Boots, shoes, and leggings
365222, G06F 1300, G11C 700
Patent
active
043162487
ABSTRACT:
Memory control circuitry is disclosed for providing memory refresh during battery back-up operation. Memory addressing circuitry is connected between circuitry, such as a processor, providing memory refresh addresses, and memory addressing inputs. During normal main power supply operation, refresh addresses are provided to the memory from the processor. Upon occurrence of a main power supply failure, and start of battery back-up operation, the last refresh address provided by the processor is stored in the memory addressing circuitry and successively incremented to provide refresh addresses to the memory .
REFERENCES:
patent: 4028675 (1977-06-01), Frankenberg
patent: 4158883 (1979-06-01), Kadono et al.
patent: 4172282 (1979-10-01), Aichelmann, Jr. et al.
patent: 4204254 (1980-05-01), Muzzani et al.
patent: 4218753 (1980-08-01), Hendrie
Clapp Gary
Data General Corporation
Wall Joel
Zache Raulfe B.
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