Memory reflection system and method for reducing bus utilization

Details Memory reflection system and method for reducing bus utilization Memory reflection system and method for reducing bus utilization

1994-10-07

1997-03-25

Beausoliel, Jr., Robert W.

395473, 395472, G06F 1100, G06F 1200

Patent

active

056153341

ABSTRACT:
A memory reflection scheme is disclosed including a snarfing agent provided with efficient memory reflection circuitry for snarfing data. The memory reflection circuitry is for snarfing particular data written back from a write back agent to a memory subsystem agent. In response to unsuccessfully snarfing the particular data written back from the write back agent to the memory subsystem agent, the memory reflection circuitry issues a command to read the particular data from the memory subsystem agent. However, the memory reflection circuitry only issues such a command if the write back agent successfully writes back the particular data to the memory subsystem agent.

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